【结帖】3518ev200+nvp6124b 采集D1，逐行扫描超时，求大神指导_问答

本帖最后由 qn1513131564 于 2019-5-31 13:19 编辑

./sample_venc 0
come in bt656
SAMPLE_VI_MODE_1_D1
u32BitCnt ===== 8
please press twice ENTER to exit this sample
[SAMPLE_COMM_VENC_GetVencStreamProc]-1117: get venc stream time out, exit thread
[SAMPLE_COMM_VENC_GetVencStreamProc]-1117: get venc stream time out, exit thread
[SAMPLE_COMM_VENC_GetVencStreamProc]-1117: get venc stream time out, exit thread
[SAMPLE_COMM_VENC_GetVencStreamProc]-1117: get venc stream time out, exit thread
[SAMPLE_COMM_VENC_GetVencStreamProc]-1117: get venc stream time out, exit thread
[SAMPLE_COMM_VENC_GetVencStreamProc]-1112: select failed!
program termination abnormally!

驱动里面修改了

for(ch=0;ch {
nvp6124_set_chnmode(ch, PAL, NVP6124_VI_SD/*NVP6124_VI_720P_2530*/);   //Ĭ��Ϊ720Pģʽ.
}
for(chip=0;chip {
if(chip_id[chip] == NVP6124_R0_ID)
{
nvp6124_set_portmode(chip, 0, NVP6124_OUTMODE_1MUX_FHD, 2);  //��nvp6124 4��port��ģʽ
nvp6124_set_portmode(chip, 1, NVP6124_OUTMODE_1MUX_FHD, 3);
nvp6124_set_portmode(chip, 2, NVP6124_OUTMODE_1MUX_FHD, 0);
nvp6124_set_portmode(chip, 3, NVP6124_OUTMODE_1MUX_FHD, 1);
}
else if(chip_id[chip] == NVP6114A_R0_ID)
{
nvp6114a_set_portmode(chip, 0, NVP6124_OUTMODE_1MUX_FHD, 0);  //��nvp6114a 2��port��ģʽ
nvp6114a_set_portmode(chip, 1, NVP6124_OUTMODE_1MUX_FHD, 1);
}
else if(chip_id[chip] == NVP6124B_R0_ID)
{
nvp6124b_set_portmode(chip, 0, /*NVP6124_OUTMODE_1MUX_HD*/NVP6124_OUTMODE_1MUX_SD, 0);  //��nvp6124b 2��port��ģʽ
nvp6124b_set_portmode(chip, 1, /*NVP6124_OUTMODE_1MUX_HD*/NVP6124_OUTMODE_1MUX_SD, 0);
}
}

设备设置参数如下
VI_DEV_ATTR_S DEV_ATTR_BT656D1_1MUX =
{
/* interface mode */
VI_MODE_BT656,
/* multiplex mode */
VI_WORK_MODE_1Multiplex,
/* r_mask g_mask b_mask*/
{0xFF000000, 0x0},
/* progessive or interleaving */
//VI_SCAN_INTERLACED,
VI_SCAN_PROGRESSIVE,
/*AdChnId*/
{-1, -1, -1, -1},
/*enDataSeq, only support yuv*/
VI_INPUT_DATA_YVYU,

/* synchronization information */
{
/*port_vsync port_vsync_neg    port_hsync       port_hsync_neg       */
VI_VSYNC_FIELD, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_VALID_SINGAL,VI_VSYNC_VALID_NEG_HIGH,

      /*hsync_hfb hsync_act hsync_hhb*/
      {0,          0,       0,
      /*vsync0_vhb vsync0_act vsync0_hhb*/
      0,          0,       0,
      /*vsync1_vhb vsync1_act vsync1_hhb*/
      0,          0,          0}
},
/* ISP bypass */
VI_PATH_BYPASS,
/* input data type */
VI_DATA_TYPE_YUV,
/* bReverse */
HI_FALSE,
   /* DEV CROP */
{0, 0, 1920, 1080}
};

哪位大神给看看
cat /proc/umap/vi

[VIU] Version: [Hi3518EV200_MPP_V1.0.1.0 B010 Release], Build Time: [Aug 23 2015, 17:39:10]

VI-VPSS is online.

-----MODULE PARAM--------------------------------------------------------------
detect_err_frame  drop_err_frame  stop_int_level
      10             0             0

-----VI DEV ATTR---------------------------------------------------------------
Dev IntfM  WkM  ComMsk0  ComMsk1 ScanM AD0 AD1 AD2 AD3 Seq DPath DType DRev CapX CapY  CapW  CapH
0 BT656 1Mux ff000000       0    P  -1  -1  -1  -1  UYVY  ByPass YUV N 0 0 720 576

-----VI HIGH DEV ATTR---------------------------------------------------------------
Dev  InputM  WkM  ComMsk0  ComMsk1 ScanM AD0 AD1 AD2 AD3 Seq CombM CompM ClkM  Fix FldP DPath DType DRev CapX CapY  CapW  CapH

-----VI PHYCHN ATTR------------------------------------------------------------
PhyChn CapX CapY  CapW  CapH  DstW  DstH CapSel Mirror Flip IntEn PixFom SrcRat DstRat Comp
   0 0 0 720 576 720 576 both    N N    Y  sp420    -1    -1    N

-----VI PHYCHN STATUS 1----------------------------------------------------------
PhyChn  Dev    IntCnt  VbFail  LosInt  TopLos  BotLos BufCnt  IntT  SendT  Field  Stride
   0 0          0    0    0    0    0    0    0    0 (null)    0

-----VI PHYCHN STATUS 2---------------------------------------------------------
PhyChn MaxIntT IntGapT MaxGapT OverCnt LIntCnt  ThrCnt AutoDis CasAutD  TmgErr    ccErrN IntRat
   0    0       0       0    0    0    0    0    0    0          0       0

-----VI OTHER ATTR------------------------------------------------------------

  Flash Mode StartTime  DuraTime  InterVal CapIdx Enable  FlashedNum
   -- Once       0       0       0    0    0          0

CSC Type HueVal  ContrVal LumaVal  StatuVal
   -- 709    50       50       50       50

DCI    En BlackGain ContrGain LightGain
   --    1       32       32       32

-----VI WDR ATTR---------------------------------------------------------------
Mode  BufNum DstW DstH  PoolId VcNum  DesNum State  bCompress
NONE    0    0    0    -1    0    0 NONE    N

-----VI WDR DES STATUS----------------------------------------------------------
   Idx IntGap IntCnt  CcErrCnt

-----VI WDR SRC STATUS----------------------------------------------------------
   Idx IntGap IntCnt  CcErrCnt

-----VI WDR COMBINE STATUS--------------------------------------------------------
IntGap IntCnt  CcErrCnt
      0       0       0

结帖：nvp6124b驱动标清1MUX_SD，即我上面设置好的即可。I2C需要配置正确，使用海思的哪个I2C，我板子用的I2C2。
设备参数

VI_DEV_ATTR_S DEV_ATTR_BT656D1_1MUX =
{
/* interface mode */
VI_MODE_BT656,
/* multiplex mode */
VI_WORK_MODE_1Multiplex,
/* r_mask g_mask b_mask*/
   //{0xFF000000, 0x0},
//add by hett on 2018-12-11 19:33
{0x00FF0000, 0x0},
/* progessive or interleaving */
VI_SCAN_INTERLACED,
/*AdChnId*/
{-1, -1, -1, -1},
/*enDataSeq, only support yuv*/
//VI_INPUT_DATA_YVYU,
//add by hett on 2018-12-12 13:10
VI_INPUT_DATA_UYVY,
/* synchronization information */
{
/*port_vsync port_vsync_neg    port_hsync       port_hsync_neg       */
VI_VSYNC_FIELD, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_VALID_SINGAL,VI_VSYNC_VALID_NEG_HIGH,

/*hsync_hfb hsync_act hsync_hhb*/
{0,          0,       0,
/*vsync0_vhb vsync0_act vsync0_hhb*/
   0,          0,       0,
/*vsync1_vhb vsync1_act vsync1_hhb*/
   0,          0,          0}
},
/* ISP bypass */
VI_PATH_BYPASS,
/* input data type */
VI_DATA_TYPE_YUV,
/* bReverse */
HI_FALSE,
   /* DEV CROP */
{0, 0, 720, 576}
};
我接的低八位，掩码设置修改。
海思模块加载时需要-offline选项才可以哦。这样我的就可以采集了。

【结帖】3518ev200+nvp6124b 采集D1，逐行扫描超时，求大神指导

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