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rk3399系统启动卡在DRM的问题

Mrs Wu
Mrs Wu  发布于  2022-11-03 10:07:57
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15个问答

rk3399系统启动卡在uboot加载drm的地方,大家帮忙看下是什么原因呢?可以排除硬件问题。
启动日志:

  1. DDR Version 1.24 20191016
  2. In
  3. channel 0
  4. CS = 0
  5. MR0=0x18
  6. MR4=0x2
  7. MR5=0x1
  8. MR8=0x8
  9. MR12=0x72
  10. MR14=0x72
  11. MR18=0x0
  12. MR19=0x0
  13. MR24=0x8
  14. MR25=0x0
  15. channel 1
  16. CS = 0
  17. MR0=0x18
  18. MR4=0x2
  19. MR5=0x1
  20. MR8=0x8
  21. MR12=0x72
  22. MR14=0x72
  23. MR18=0x0
  24. MR19=0x0
  25. MR24=0x8
  26. MR25=0x0
  27. channel 0 training pass!
  28. channel 1 training pass!
  29. change freq to 416MHz 0,1
  30. Channel 0: LPDDR4,416MHz
  31. Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
  32. Channel 1: LPDDR4,416MHz
  33. Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
  34. 256B stride
  35. channel 0
  36. CS = 0
  37. MR0=0x18
  38. MR4=0x2
  39. MR5=0x1
  40. MR8=0x8
  41. MR12=0x72
  42. MR14=0x72
  43. MR18=0x0
  44. MR19=0x0
  45. MR24=0x8
  46. MR25=0x0
  47. channel 1
  48. CS = 0
  49. MR0=0x18
  50. MR4=0x2
  51. MR5=0x1
  52. MR8=0x8
  53. MR12=0x72
  54. MR14=0x72
  55. MR18=0x0
  56. MR19=0x0
  57. MR24=0x8
  58. MR25=0x0
  59. channel 0 training pass!
  60. channel 1 training pass!
  61. channel 0, cs 0, advanced training done
  62. channel 1, cs 0, advanced training done
  63. change freq to 856MHz 1,0
  64. ch 0 ddrconfig = 0x101, ddrsize = 0x20
  65. ch 1 ddrconfig = 0x101, ddrsize = 0x20
  66. pmugrf_os_reg2 = 0x3281F281, stride = 0x9
  67. ddr_set_rate to 328MHZ
  68. ddr_set_rate to 666MHZ
  69. ddr_set_rate to 416MHZ, ctl_index 0
  70. ddr_set_rate to 856MHZ, ctl_index 1
  71. support 416 856 328 666 MHz, current 856MHz
  72. OUT
  73. Boot1 Release Time: May 29 2020 17:36:36, version: 1.26
  74. CPUId = 0x0
  75. ChipType = 0x10, 347
  76. SdmmcInit=2 0
  77. BootCapSize=100000
  78. UserCapSize=14910MB
  79. FwPartOffset=2000 , 100000
  80. mmc0:cmd8,20
  81. mmc0:cmd5,20
  82. mmc0:cmd55,20
  83. mmc0:cmd1,20
  84. mmc0:cmd8,20
  85. mmc0:cmd5,20
  86. mmc0:cmd55,20
  87. mmc0:cmd1,20
  88. mmc0:cmd8,20
  89. mmc0:cmd5,20
  90. mmc0:cmd55,20
  91. mmc0:cmd1,20
  92. SdmmcInit=0 1
  93. StorageInit ok = 68531
  94. SecureMode = 0
  95. SecureInit read PBA: 0x4
  96. SecureInit read PBA: 0x404
  97. SecureInit read PBA: 0x804
  98. SecureInit read PBA: 0xc04
  99. SecureInit read PBA: 0x1004
  100. SecureInit read PBA: 0x1404
  101. SecureInit read PBA: 0x1804
  102. SecureInit read PBA: 0x1c04
  103. SecureInit ret = 0, SecureMode = 0
  104. atags_set_bootdev: ret:(0)
  105. GPT part: 0, name: uboot, start:0x4000, size:0x2000
  106. GPT part: 1, name: trust, start:0x6000, size:0x2000
  107. GPT part: 2, name: misc, start:0x8000, size:0x2000
  108. GPT part: 3, name: boot, start:0xa000, size:0x10000
  109. GPT part: 4, name: recovery, start:0x1a000, size:0x10000
  110. GPT part: 5, name: backup, start:0x2a000, size:0x10000
  111. GPT part: 6, name: oem, start:0x3a000, size:0x20000
  112. GPT part: 7, name: rootfs, start:0x5a000, size:0xc00000
  113. GPT part: 8, name: userdata, start:0xc5a000, size:0x10c4fdf
  114. find part:uboot OK. first_lba:0x4000.
  115. find part:trust OK. first_lba:0x6000.
  116. Trust Addr:0x6000, 0x58334c42
  117. No find bl30.bin
  118. Load uboot, ReadLba = 4000
  119. Load OK, addr=0x200000, size=0xfc048
  120. RunBL31 0x40000 @ 111986 us
  121. NOTICE: BL31: v1.3(release):845ee93
  122. NOTICE: BL31: Built : 15:51:11, Jul 22 2020
  123. NOTICE: BL31: Rockchip release version: v1.1
  124. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  125. INFO: Using opteed sec cpu_context!
  126. INFO: boot cpu mask: 0
  127. INFO: plat_rockchip_pmu_init(1196): pd status 3e
  128. INFO: BL31: Initializing runtime services
  129. INFO: BL31: Initializing BL32
  130. INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-266-gee81607c #1 Mon Aug 17 09:23:30 UTC 2020 aarch64)
  131. INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
  132. INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
  133. INFO: BL31: Preparing for EL3 exit to normal world
  134. INFO: Entry point address = 0x200000
  135. INFO: SPSR = 0x3c9
  136. U-Boot 2017.09-g2e32f6669c #gcp (Mar 10 2022 - 15:35:44 +0800)
  137. Model: Rockchip RK3399 Evaluation Board
  138. PreSerial: 2, raw, 0xff1a0000
  139. DRAM: 2 GiB
  140. Sysmem: init
  141. Relocation Offset: 7dbc8000, fdt: 7bdbc358
  142. Using default environment
  143. dwmmc@fe320000: 1, sdhci@fe330000: 0
  144. Bootdev(atags): mmc 0
  145. MMC0: HS400, 150Mhz
  146. PartType: EFI
  147. boot mode: None
  148. Found DTB in boot part
  149. DTB: rk-kernel.dtb
  150. HASH: OK
  151. I2c0 speed: 400000Hz
  152. PMIC: RK808
  153. vdd_center 900000 uV
  154. vdd_cpu_l 900000 uV
  155. Model: Rockchip RK3399 EVB IND LPDDR4 Board edp (Linux)
  156. Rockchip UBOOT DRM driver version: v1.0.1
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易百纳技术社区
张显显 发布于2022-11-03 14:24:39

这样修改:
&edp_in_vopb {
status = “okay”;
};

或者这样修改试下:
&edp {
status = “disabled”;
};

0

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